This invention relates generally to photoresist processes for etching semiconductor devices and particularly to a multilevel photoresist process utilizing an absorbant dye to improve line resolution and uniformity.
In integrated circuit technology, significant effort has been expended on increasing the resolution of photoresist processes because greater resolution enables a greater number of circuits to be placed on a single chip. This increase in circuit density increases the potential complexity and speed of the resulting integrated circuit.
Present techniques in optical projection printing can resolve 1 micron lines in photoresist with good linewidth control when flat, low reflectivity substrates are used. However, when exposing resist on substrates with surface topography, there are resist control problems introduced by optical reflections and by resist thickness non-uniformity.
Reflection of light from the substrate-resist interface produces variations in the light intensity in the resist during exposure resulting in non-uniform linewidth. Light can scatter from the interface into regions of the resist where no exposure was intended resulting in a broadening or blooming of the linewidth. The amount of scattering and reflection will typically vary from region to region resulting in linewidth non-uniformity.
To eliminate the effects of chromatic aberration, monochromatic or quasi-monochromatic light is commonly used in resist projection printing techniques to expose the resist. Unfortunately, the effects of interface reflections on resolution is particularly significant when monochromatic or quasi-monochromatic light is used to expose the resist. When such light reflects from the substrate-resist interface, the reflected light interferes with the incident light to form standing waves within the resist. In the case of highly reflective substrate regions, the standing wave effect is more pronounced. Part of the reflected light also reflects back to the substrate from the top surface of the resist. Such multiple reflection of the incident light between the top and bottom surfaces of the resist layer results in a resonance affecting the light intensity within the resist. The time required to expose the resist is generally an increasing function of resist thickness because of the increased total amount of light required to expose an increased amount of resist. However, because of the resonant effect, the time of exposure also includes a harmonic component which varies between successive maximum and minimum values as the resist thickness varies through a quarter wavelength of the incident light. If the resist thickness is non-uniform, there will be a non-uniform exposure resulting in variable linewidth control.
The photoresist linewidth control problems due to scattering and reflection from the substrate-resist interface can be solved by reducing or eliminating the substrate reflection. In one prior proposal (H. A. Koury and K. V. Patel, "Anti-Interference Phenomena Coating", IBM Technical Disclosure Bulletin, Vol. 13, No. 1, page 38, June 1970) a thin ultraviolet light absorbing layer containing a dye such as methyl orange or methanil yellow is deposited at the substrate-resist interface.
Linewidth control problems also arise from substrate topography. As indicated above, the resonance effect and resist thickness variation can combine to produce linewidth nonuniformity. In addition, when a layer of resist is exposed and developed, the resulting resist pattern will typically have sloping walls so that the width of the resist pattern at the surface of the substrate will vary with the resist thickness. Because a layer of material deposited on a non-flat surface will inherently vary in thickness, substrate topography will produce linewidth control problems. The problems due to substrate surface topography are addressed in the tri-level technique disclosed in the article by J. M. Moran and D. M. Maydan, J. Vac. Sci. Technol., 16, 1620 (1979) and the article by J. H. Bruning, J. Vac. Sci. Technol., 17, 1147 (1980). In that technique a thick bottom layer (2-3 micron) of Hunt positive resist is deposited on the substrate to produce a planar surface on which a thin (0.1 micron) layer of a silicon dioxide is deposited. A thin (0.5 micron) top resist layer is spun onto the silicon dioxide layer. The top resist is then exposed (e.g. by a projection printing technique using ultraviolet light or x-ray exposure) and developed. The intermediate silicon dioxide layer and the bottom layer are delineated by a reactive ion etching process.